LZ之前看过一点点的GPU的加速代码后来发现要想写好cuda代码对硬件的理解内存的理解并行计算等要求还是很高的然后就很怂的放弃了没有继续下去而且实验室基本上都是做CV的很少有同学做HPC所以对这方面属于真小白。直到前阵子去GTC CHINA也还是小白CUDA也就用过最基础的cudaMalloc和cudaMemcpy这两个常规操作直到后续需要将整个算法移植到gpu上才不得不看cuda的相关知识。但是这个对LZ未尝不是件好事互联网行业最近两年一直在降温热钱也在减少AI也不是万能的甚至说是死亡AI原来确实泡沫太大了需要挤挤。而且现在各个学校都在开设人工智能学院可想而知四年后的市场高端人才一定是供不应求的但处于一些比较基础的AI算法人员肯定会供过于求如果只会从github上下载一些代码然后换个数据训练调个参数竞争力必然是不强的。除了人还有机器AI芯片各种AI集成框架autoML Metalearning等一系列软硬件会使得深度学习极为简单以后连调参的机会都不给你了所以趁着自己年轻刚好还有对应的项目多学习些“硬菜”入门门槛高点你才能保持的核心竞争力要做到“人无我有”还是挺难的快过年了也希望自己能够沉下心来好好学习LZ现在的老大很好也感觉自己很幸运。回到正题以前弄深度学习配置环境上来就是安装CUDA相信很多小伙伴都被安装CUDA所折磨过但是CUDA到底是什么呢百度百科是这么说的CUDACompute Unified Device Architecture是显卡厂商NVIDIA推出的运算平台。 CUDA™是一种由NVIDIA推出的通用并行计算架构该架构使GPU能够解决复杂的计算问题。 它包含了CUDA指令集架构ISA以及GPU内部的并行计算引擎。 开发人员可以使用C语言来为CUDA™架构编写程序C语言是应用最广泛的一种高级编程语言。所编写出的程序可以在支持CUDA™的处理器上以超高性能运行。CUDA3.0已经开始支持C和FORTRAN。换个方式理解就是为程序猿利用GPU的计算能力提供的一个工具什么是cuDnnNVIDIA cuDNN是用于深度神经网络的GPU加速库。它强调性能、易用性和低内存开销。NVIDIA cuDNN可以集成到更高级别的机器学习框架中如谷歌的Tensorflow、加州大学伯克利分校的流行caffe软件。简单的插入式设计可以让开发人员专注于设计和实现神经网络模型而不是简单调整性能同时还可以在GPU上实现高性能现代并行计算。LZ使用cudnn和不使用cudnn进行测试发现使用cudnn确实inference的更快而且效果非常好所以配置深度框架都会要求下载cudnn的库况且配置很简单干嘛不用呢第一个cuda代码#includecuda_runtime_api.h#includeiostream#defineRANDOM(x)(rand()%x)#defineMAX10// single block single thread__global__voidvector_add_gpu_1(int*d_a,int*d_b,int*d_c,intn){for(inti0;in;i){d_c[i]d_a[i]d_b[i];}}// single block multiple threads__global__voidvector_add_gpu_2(int*d_a,int*d_b,int*d_c,intn){inttidthreadIdx.x;constintt_nblockDim.x;while(tidn){d_c[tid]d_a[tid]d_b[tid];tidt_n;}}// multiple blocks multiple threads__global__voidvector_add_gpu_3(int*d_a,int*d_b,int*d_c,intn){constinttidxthreadIdx.x;constintbidxblockIdx.x;constintt_ngridDim.x*blockDim.x;inttidbidx*blockDim.xtidx;while(tidn){d_c[tid]d_a[tid]d_b[tid];tidt_n;}}intmain(){intcount;cudaGetDeviceCount(count);//返回计算能力大于1.0的GPU数量intgpuid0;//选择GPU 0cudaSetDevice(gpuid);//根据GPU的index设置需要的GPU默认为0cudaGetDevice(gpuid);//获得当前线程所使用的GPU index,赋值给devicestructcudaDevicePropdevice_prop;cudaGetDeviceProperties(device_prop,0);std::coutdevice_prop.namestd::endl;std::cout(device_prop.totalGlobalMem/1024/1024) MB std::endl;std::cout(device_prop.sharedMemPerBlock/1024) KB std::endl;/***向量相加的实现***/intn5;int*a(int*)malloc(sizeof(int)*n);int*b(int*)malloc(sizeof(int)*n);int*c(int*)malloc(sizeof(int)*n);for(size_ti0;in;i){a[i]RANDOM(MAX);b[i]RANDOM(MAX);std::couta[i] b[i]std::endl;}cudaError_tcudaStatus;// GPU memory allocateint*d_a,*d_b,*d_c;cudaMalloc((void**)d_a,sizeof(int)*n);cudaMalloc((void**)d_b,sizeof(int)*n);cudaMalloc((void**)d_c,sizeof(int)*n);// data a and b copy to GPUcudaStatuscudaMemcpy(d_a,a,sizeof(int)*n,cudaMemcpyHostToDevice);if(cudaStatus!cudaSuccess){LOG(ERROR)(Memory copy failed! error code: %s,cudaGetErrorString(cudaStatus))std::endl;}cudaStatuscudaMemcpy(d_b,b,sizeof(int)*n,cudaMemcpyHostToDevice);if(cudaStatus!cudaSuccess){LOG(ERROR)(Memory copy failed! error code: %s,cudaGetErrorString(cudaStatus))std::endl;}//vector_add_gpu_11, 1(d_a, d_b, d_c, n);//vector_add_gpu_21, 12(d_a, d_b, d_c, n);vector_add_gpu_34,3(d_a,d_b,d_c,n);// result copy back to CPUcudaMemcpy(c,d_c,sizeof(int)*n,cudaMemcpyDeviceToHost);std::coutthe result of add is: std::endl;for(size_ti0;in;i){std::cout c[i];}// GPU memory freecudaFree(d_a);cudaFree(d_b);cudaFree(d_c);free(a);free(b);free(c);return0;}输出的结果GeForce GTX970M3024MB48KB3675356291the result of add is:9128810关于cuda的设备管理函数可以对应下面参数进行查询/** * CUDA device properties */struct__device_builtin__cudaDeviceProp{charname[256];/** ASCII string identifying device */cudaUUID_tuuid;/** 16-byte unique identifier */charluid[8];/** 8-byte locally unique identifier. Value is undefined on TCC and non-Windows platforms */unsignedintluidDeviceNodeMask;/** LUID device node mask. Value is undefined on TCC and non-Windows platforms */size_ttotalGlobalMem;/** Global memory available on device in bytes */size_tsharedMemPerBlock;/** Shared memory available per block in bytes */intregsPerBlock;/** 32-bit registers available per block */intwarpSize;/** Warp size in threads */size_tmemPitch;/** Maximum pitch in bytes allowed by memory copies */intmaxThreadsPerBlock;/** Maximum number of threads per block */intmaxThreadsDim[3];/** Maximum size of each dimension of a block */intmaxGridSize[3];/** Maximum size of each dimension of a grid */intclockRate;/** Clock frequency in kilohertz */size_ttotalConstMem;/** Constant memory available on device in bytes */intmajor;/** Major compute capability */intminor;/** Minor compute capability */size_ttextureAlignment;/** Alignment requirement for textures */size_ttexturePitchAlignment;/** Pitch alignment requirement for texture references bound to pitched memory */intdeviceOverlap;/** Device can concurrently copy memory and execute a kernel. Deprecated. Use instead asyncEngineCount. */intmultiProcessorCount;/** Number of multiprocessors on device */intkernelExecTimeoutEnabled;/** Specified whether there is a run time limit on kernels */intintegrated;/** Device is integrated as opposed to discrete */intcanMapHostMemory;/** Device can map host memory with cudaHostAlloc/cudaHostGetDevicePointer */intcomputeMode;/** Compute mode (See ::cudaComputeMode) */intmaxTexture1D;/** Maximum 1D texture size */intmaxTexture1DMipmap;/** Maximum 1D mipmapped texture size */intmaxTexture1DLinear;/** Maximum size for 1D textures bound to linear memory */intmaxTexture2D[2];/** Maximum 2D texture dimensions */intmaxTexture2DMipmap[2];/** Maximum 2D mipmapped texture dimensions */intmaxTexture2DLinear[3];/** Maximum dimensions (width, height, pitch) for 2D textures bound to pitched memory */intmaxTexture2DGather[2];/** Maximum 2D texture dimensions if texture gather operations have to be performed */intmaxTexture3D[3];/** Maximum 3D texture dimensions */intmaxTexture3DAlt[3];/** Maximum alternate 3D texture dimensions */intmaxTextureCubemap;/** Maximum Cubemap texture dimensions */intmaxTexture1DLayered[2];/** Maximum 1D layered texture dimensions */intmaxTexture2DLayered[3];/** Maximum 2D layered texture dimensions */intmaxTextureCubemapLayered[2];/** Maximum Cubemap layered texture dimensions */intmaxSurface1D;/** Maximum 1D surface size */intmaxSurface2D[2];/** Maximum 2D surface dimensions */intmaxSurface3D[3];/** Maximum 3D surface dimensions */intmaxSurface1DLayered[2];/** Maximum 1D layered surface dimensions */intmaxSurface2DLayered[3];/** Maximum 2D layered surface dimensions */intmaxSurfaceCubemap;/** Maximum Cubemap surface dimensions */intmaxSurfaceCubemapLayered[2];/** Maximum Cubemap layered surface dimensions */size_tsurfaceAlignment;/** Alignment requirements for surfaces */intconcurrentKernels;/** Device can possibly execute multiple kernels concurrently */intECCEnabled;/** Device has ECC support enabled */intpciBusID;/** PCI bus ID of the device */intpciDeviceID;/** PCI device ID of the device */intpciDomainID;/** PCI domain ID of the device */inttccDriver;/** 1 if device is a Tesla device using TCC driver, 0 otherwise */intasyncEngineCount;/** Number of asynchronous engines */intunifiedAddressing;/** Device shares a unified address space with the host */intmemoryClockRate;/** Peak memory clock frequency in kilohertz */intmemoryBusWidth;/** Global memory bus width in bits */intl2CacheSize;/** Size of L2 cache in bytes */intmaxThreadsPerMultiProcessor;/** Maximum resident threads per multiprocessor */intstreamPrioritiesSupported;/** Device supports stream priorities */intglobalL1CacheSupported;/** Device supports caching globals in L1 */intlocalL1CacheSupported;/** Device supports caching locals in L1 */size_tsharedMemPerMultiprocessor;/** Shared memory available per multiprocessor in bytes */intregsPerMultiprocessor;/** 32-bit registers available per multiprocessor */intmanagedMemory;/** Device supports allocating managed memory on this system */intisMultiGpuBoard;/** Device is on a multi-GPU board */intmultiGpuBoardGroupID;/** Unique identifier for a group of devices on the same multi-GPU board */inthostNativeAtomicSupported;/** Link between the device and the host supports native atomic operations */intsingleToDoublePrecisionPerfRatio;/** Ratio of single precision performance (in floating-point operations per second) to double precision performance */intpageableMemoryAccess;/** Device supports coherently accessing pageable memory without calling cudaHostRegister on it */intconcurrentManagedAccess;/** Device can coherently access managed memory concurrently with the CPU */intcomputePreemptionSupported;/** Device supports Compute Preemption */intcanUseHostPointerForRegisteredMem;/** Device can access host registered memory at the same virtual address as the CPU */intcooperativeLaunch;/** Device supports launching cooperative kernels via ::cudaLaunchCooperativeKernel */intcooperativeMultiDeviceLaunch;/** Device can participate in cooperative kernels launched via ::cudaLaunchCooperativeKernelMultiDevice */size_tsharedMemPerBlockOptin;/** Per device maximum shared memory per block usable by special opt in */intpageableMemoryAccessUsesHostPageTables;/** Device accesses pageable memory via the hosts page tables */intdirectManagedMemAccessFromHost;/** Host can directly access managed memory on the device without migration. */};写CUDA代码一直很犹豫这也算是迈出了第一步吧/(ㄒoㄒ)/~~参考地址https://baike.baidu.com/item/CUDA 
长河君 · 2026/10/23 1:38:55 · 阅读 1.2k 【CUDA】CUDA:（一） 基本设备管理函数、向量相加
LZ之前看过一点点的GPU的加速代码后来发现要想写好cuda代码对硬件的理解内存的理解并行计算等要求还是很高的然后就很怂的放弃了没有继续下去而且实验室基本上都是做CV的很少有同学做HPC所以对这方面属于真小白。直到前阵子去GTC CHINA也还是小白CUDA也就用过最基础的cudaMalloc和cudaMemcpy这两个常规操作直到后续需要将整个算法移植到gpu上才不得不看cuda的相关知识。但是这个对LZ未尝不是件好事互联网行业最近两年一直在降温热钱也在减少AI也不是万能的甚至说是死亡AI原来确实泡沫太大了需要挤挤。而且现在各个学校都在开设人工智能学院可想而知四年后的市场高端人才一定是供不应求的但处于一些比较基础的AI算法人员肯定会供过于求如果只会从github上下载一些代码然后换个数据训练调个参数竞争力必然是不强的。除了人还有机器AI芯片各种AI集成框架autoML Metalearning等一系列软硬件会使得深度学习极为简单以后连调参的机会都不给你了所以趁着自己年轻刚好还有对应的项目多学习些“硬菜”入门门槛高点你才能保持的核心竞争力要做到“人无我有”还是挺难的快过年了也希望自己能够沉下心来好好学习LZ现在的老大很好也感觉自己很幸运。回到正题以前弄深度学习配置环境上来就是安装CUDA相信很多小伙伴都被安装CUDA所折磨过但是CUDA到底是什么呢百度百科是这么说的CUDACompute Unified Device Architecture是显卡厂商NVIDIA推出的运算平台。 CUDA™是一种由NVIDIA推出的通用并行计算架构该架构使GPU能够解决复杂的计算问题。 它包含了CUDA指令集架构ISA以及GPU内部的并行计算引擎。 开发人员可以使用C语言来为CUDA™架构编写程序C语言是应用最广泛的一种高级编程语言。所编写出的程序可以在支持CUDA™的处理器上以超高性能运行。CUDA3.0已经开始支持C和FORTRAN。换个方式理解就是为程序猿利用GPU的计算能力提供的一个工具什么是cuDnnNVIDIA cuDNN是用于深度神经网络的GPU加速库。它强调性能、易用性和低内存开销。NVIDIA cuDNN可以集成到更高级别的机器学习框架中如谷歌的Tensorflow、加州大学伯克利分校的流行caffe软件。简单的插入式设计可以让开发人员专注于设计和实现神经网络模型而不是简单调整性能同时还可以在GPU上实现高性能现代并行计算。LZ使用cudnn和不使用cudnn进行测试发现使用cudnn确实inference的更快而且效果非常好所以配置深度框架都会要求下载cudnn的库况且配置很简单干嘛不用呢第一个cuda代码#includecuda_runtime_api.h#includeiostream#defineRANDOM(x)(rand()%x)#defineMAX10// single block single thread__global__voidvector_add_gpu_1(int*d_a,int*d_b,int*d_c,intn){for(inti0;in;i){d_c[i]d_a[i]d_b[i];}}// single block multiple threads__global__voidvector_add_gpu_2(int*d_a,int*d_b,int*d_c,intn){inttidthreadIdx.x;constintt_nblockDim.x;while(tidn){d_c[tid]d_a[tid]d_b[tid];tidt_n;}}// multiple blocks multiple threads__global__voidvector_add_gpu_3(int*d_a,int*d_b,int*d_c,intn){constinttidxthreadIdx.x;constintbidxblockIdx.x;constintt_ngridDim.x*blockDim.x;inttidbidx*blockDim.xtidx;while(tidn){d_c[tid]d_a[tid]d_b[tid];tidt_n;}}intmain(){intcount;cudaGetDeviceCount(count);//返回计算能力大于1.0的GPU数量intgpuid0;//选择GPU 0cudaSetDevice(gpuid);//根据GPU的index设置需要的GPU默认为0cudaGetDevice(gpuid);//获得当前线程所使用的GPU index,赋值给devicestructcudaDevicePropdevice_prop;cudaGetDeviceProperties(device_prop,0);std::coutdevice_prop.namestd::endl;std::cout(device_prop.totalGlobalMem/1024/1024) MB std::endl;std::cout(device_prop.sharedMemPerBlock/1024) KB std::endl;/***向量相加的实现***/intn5;int*a(int*)malloc(sizeof(int)*n);int*b(int*)malloc(sizeof(int)*n);int*c(int*)malloc(sizeof(int)*n);for(size_ti0;in;i){a[i]RANDOM(MAX);b[i]RANDOM(MAX);std::couta[i] b[i]std::endl;}cudaError_tcudaStatus;// GPU memory allocateint*d_a,*d_b,*d_c;cudaMalloc((void**)d_a,sizeof(int)*n);cudaMalloc((void**)d_b,sizeof(int)*n);cudaMalloc((void**)d_c,sizeof(int)*n);// data a and b copy to GPUcudaStatuscudaMemcpy(d_a,a,sizeof(int)*n,cudaMemcpyHostToDevice);if(cudaStatus!cudaSuccess){LOG(ERROR)(Memory copy failed! error code: %s,cudaGetErrorString(cudaStatus))std::endl;}cudaStatuscudaMemcpy(d_b,b,sizeof(int)*n,cudaMemcpyHostToDevice);if(cudaStatus!cudaSuccess){LOG(ERROR)(Memory copy failed! error code: %s,cudaGetErrorString(cudaStatus))std::endl;}//vector_add_gpu_11, 1(d_a, d_b, d_c, n);//vector_add_gpu_21, 12(d_a, d_b, d_c, n);vector_add_gpu_34,3(d_a,d_b,d_c,n);// result copy back to CPUcudaMemcpy(c,d_c,sizeof(int)*n,cudaMemcpyDeviceToHost);std::coutthe result of add is: std::endl;for(size_ti0;in;i){std::cout c[i];}// GPU memory freecudaFree(d_a);cudaFree(d_b);cudaFree(d_c);free(a);free(b);free(c);return0;}输出的结果GeForce GTX970M3024MB48KB3675356291the result of add is:9128810关于cuda的设备管理函数可以对应下面参数进行查询/** * CUDA device properties */struct__device_builtin__cudaDeviceProp{charname[256];/** ASCII string identifying device */cudaUUID_tuuid;/** 16-byte unique identifier */charluid[8];/** 8-byte locally unique identifier. Value is undefined on TCC and non-Windows platforms */unsignedintluidDeviceNodeMask;/** LUID device node mask. Value is undefined on TCC and non-Windows platforms */size_ttotalGlobalMem;/** Global memory available on device in bytes */size_tsharedMemPerBlock;/** Shared memory available per block in bytes */intregsPerBlock;/** 32-bit registers available per block */intwarpSize;/** Warp size in threads */size_tmemPitch;/** Maximum pitch in bytes allowed by memory copies */intmaxThreadsPerBlock;/** Maximum number of threads per block */intmaxThreadsDim[3];/** Maximum size of each dimension of a block */intmaxGridSize[3];/** Maximum size of each dimension of a grid */intclockRate;/** Clock frequency in kilohertz */size_ttotalConstMem;/** Constant memory available on device in bytes */intmajor;/** Major compute capability */intminor;/** Minor compute capability */size_ttextureAlignment;/** Alignment requirement for textures */size_ttexturePitchAlignment;/** Pitch alignment requirement for texture references bound to pitched memory */intdeviceOverlap;/** Device can concurrently copy memory and execute a kernel. Deprecated. Use instead asyncEngineCount. */intmultiProcessorCount;/** Number of multiprocessors on device */intkernelExecTimeoutEnabled;/** Specified whether there is a run time limit on kernels */intintegrated;/** Device is integrated as opposed to discrete */intcanMapHostMemory;/** Device can map host memory with cudaHostAlloc/cudaHostGetDevicePointer */intcomputeMode;/** Compute mode (See ::cudaComputeMode) */intmaxTexture1D;/** Maximum 1D texture size */intmaxTexture1DMipmap;/** Maximum 1D mipmapped texture size */intmaxTexture1DLinear;/** Maximum size for 1D textures bound to linear memory */intmaxTexture2D[2];/** Maximum 2D texture dimensions */intmaxTexture2DMipmap[2];/** Maximum 2D mipmapped texture dimensions */intmaxTexture2DLinear[3];/** Maximum dimensions (width, height, pitch) for 2D textures bound to pitched memory */intmaxTexture2DGather[2];/** Maximum 2D texture dimensions if texture gather operations have to be performed */intmaxTexture3D[3];/** Maximum 3D texture dimensions */intmaxTexture3DAlt[3];/** Maximum alternate 3D texture dimensions */intmaxTextureCubemap;/** Maximum Cubemap texture dimensions */intmaxTexture1DLayered[2];/** Maximum 1D layered texture dimensions */intmaxTexture2DLayered[3];/** Maximum 2D layered texture dimensions */intmaxTextureCubemapLayered[2];/** Maximum Cubemap layered texture dimensions */intmaxSurface1D;/** Maximum 1D surface size */intmaxSurface2D[2];/** Maximum 2D surface dimensions */intmaxSurface3D[3];/** Maximum 3D surface dimensions */intmaxSurface1DLayered[2];/** Maximum 1D layered surface dimensions */intmaxSurface2DLayered[3];/** Maximum 2D layered surface dimensions */intmaxSurfaceCubemap;/** Maximum Cubemap surface dimensions */intmaxSurfaceCubemapLayered[2];/** Maximum Cubemap layered surface dimensions */size_tsurfaceAlignment;/** Alignment requirements for surfaces */intconcurrentKernels;/** Device can possibly execute multiple kernels concurrently */intECCEnabled;/** Device has ECC support enabled */intpciBusID;/** PCI bus ID of the device */intpciDeviceID;/** PCI device ID of the device */intpciDomainID;/** PCI domain ID of the device */inttccDriver;/** 1 if device is a Tesla device using TCC driver, 0 otherwise */intasyncEngineCount;/** Number of asynchronous engines */intunifiedAddressing;/** Device shares a unified address space with the host */intmemoryClockRate;/** Peak memory clock frequency in kilohertz */intmemoryBusWidth;/** Global memory bus width in bits */intl2CacheSize;/** Size of L2 cache in bytes */intmaxThreadsPerMultiProcessor;/** Maximum resident threads per multiprocessor */intstreamPrioritiesSupported;/** Device supports stream priorities */intglobalL1CacheSupported;/** Device supports caching globals in L1 */intlocalL1CacheSupported;/** Device supports caching locals in L1 */size_tsharedMemPerMultiprocessor;/** Shared memory available per multiprocessor in bytes */intregsPerMultiprocessor;/** 32-bit registers available per multiprocessor */intmanagedMemory;/** Device supports allocating managed memory on this system */intisMultiGpuBoard;/** Device is on a multi-GPU board */intmultiGpuBoardGroupID;/** Unique identifier for a group of devices on the same multi-GPU board */inthostNativeAtomicSupported;/** Link between the device and the host supports native atomic operations */intsingleToDoublePrecisionPerfRatio;/** Ratio of single precision performance (in floating-point operations per second) to double precision performance */intpageableMemoryAccess;/** Device supports coherently accessing pageable memory without calling cudaHostRegister on it */intconcurrentManagedAccess;/** Device can coherently access managed memory concurrently with the CPU */intcomputePreemptionSupported;/** Device supports Compute Preemption */intcanUseHostPointerForRegisteredMem;/** Device can access host registered memory at the same virtual address as the CPU */intcooperativeLaunch;/** Device supports launching cooperative kernels via ::cudaLaunchCooperativeKernel */intcooperativeMultiDeviceLaunch;/** Device can participate in cooperative kernels launched via ::cudaLaunchCooperativeKernelMultiDevice */size_tsharedMemPerBlockOptin;/** Per device maximum shared memory per block usable by special opt in */intpageableMemoryAccessUsesHostPageTables;/** Device accesses pageable memory via the hosts page tables */intdirectManagedMemAccessFromHost;/** Host can directly access managed memory on the device without migration. */};写CUDA代码一直很犹豫这也算是迈出了第一步吧/(ㄒoㄒ)/~~参考地址https://baike.baidu.com/item/CUDA